PC3-ALLEGRO
3rd Generation Intel® Core™ i7 Processor
The PC3-ALLEGRO is a rich featured high performance 4HP/3U CompactPCI® PlusIO CPU board, equipped with a 3rd Generation Intel® Core™ i7 Ivy Bridge + ECC (dual- or quad-core) mobile processor. The PC3-ALLEGRO front panel is provided with two Gigabit Ethernet jacks, two USB 3.0 receptacles, and two Mini-DisplayPort connectors for attachment of high resolution digital displays, configured e.g. as extended desktop (option VGA).T
he PC3-ALLEGRO is equipped with up to 16GB RAM with ECC support. 8GB memory-down are provided for rugged applications, and another 8GB are available via the DDR3 ECC SO-DIMM socket. The PC3-ALLEGRO backplane connectors comply with the PICMG® CompactPCI® PlusIO system slot specification, suitable for a rear I/O module or hybrid CompactPCI® Serial systems. Several low profile mezzanine modules are available as mass storage solution. The PC3-ALLEGRO is equipped with a set of local expansion interface connectors, which can be optionally used to attach a mezzanine side board. A variety of expansion cards is available,
e.g. providing legacy I/O and additional PCI Express® based I/O controllers such as SATA, USB 3.0 and Gigabit Ethernet, or a third video output. Most mezzanine side cards can accommodate in addition a 2.5-inch drive.
Typically, the PC3-ALLEGRO and the related side card would come as a readily assembled 8HP unit. As an alternate, low profile Flash based mezzanine storage modules are available that fit on the PC3-ALLEGRO while maintaining the 4HP profile. The C48-M2 module e.g. is equipped with two fast M.2 embedded SATA Solid State Drives (SSD), suitable for installation of any popular operating system.
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Firmware
- Firmware Update
Release Notes
=================================================
Release Notes for Phoenix BIOS on EKF PC3-ALLEGRO
=================================================This file describes changes, extensions and bug fixes made in Phoenix BIOS
for EKF PC3-ALLEGRO. For any further questions contact EKF at:
Email : support@ekf.de
Internet : www.ekf.com===================================================================================================================
2020-01-23: UEFI/BIOS release, Build #200 production
– Added support for Secure Boot
Setup [F2]: Security -> Secure Boot Configuration
Note: A password must be set before this menu can be selected– Enabled Setup node to control the CSM
Setup [F2]: Main -> Boot Features -> CSM Support
Available options: Yes (Default), No
The CSM module (Compatibility Support Module) provides backward compatibility services for legacy OS or Expansion ROMs.– Implemented GOP driver version 3.0.13.1013
– Adapted Video BIOS table to EKF hardware for GOP driver
– Fixed an UEFI internal bug in communication buffer handling
– Added SX6-FIREWORKS in list of installed EKF boards
– Aborted loading of drivers in UEFI Shell if a security violation is detected
===================================================================================================================
2019-07-26: BIOS release, Build #196 production
– Updated IvyBridge CPU microcode (CPUID 0x306A9) with version 33 (February 2019)
– Added feature to perform an additional CPU and Board Reset after the system was powered-on
Setup (F2): Advanced -> Miscellaneous Configuration -> Reset after Power-On
Available options: Disabled (Default), PEI Phase, DXE Phase
Setup (F2): Advanced -> Miscellaneous Configuration -> Type of Reset after Power-On
Available options: Hard Reset (Default), Full Reset– Fixed a bug when Setup mode for SMBus routing to CompactPCI was set to “Enabled”
Setup [F2]: Advanced -> Board Configuration -> SMBus to CompactPCI===================================================================================================================
2019-04-17: BIOS release, Build #194 production
– Updated IvyBridge CPU microcode (CPUID 0x306A9) with version 31 (April 2018)
– UEFI Shell: Added new option for Shell command ekfpci (alias p)
Option -l3 shows PCI buses occupied by PCI bridges– UEFI Shell: Fixed a bug in Shell command “reset”
Option -c now really performs a cold reset– UEFI Shell: Added feature to measure memory write speed in command ekfma
– Added SX5-STREAM, SA4-COUNTRY, SRF-FAN, SCL-RHYTHM, SK5-BALL, SL6-COMBO, SBF-CROSSOVER,
SXP-JAM, SPY-RIG, SU3-ENSEMBLE and SU5-ENSEMBLE in list of installed EKF boards– Changed default of option ‘PME SCI’ of PCH PCI Express Root Port 8 to Enabled
Setup (F2): Advanced -> PCI Express Configuration -> PCH PCI Express Root Port 8 Configuration -> PME SCI– Added custom specific Setup Defaults
===================================================================================================================
2017-09-07: BIOS release, Build #192 production
– Added SE4-TEMPO and EK4-WALTZ in list of installed EKF boards
– Added Setup option to select ACPI Reset Mode (used for OS Restart)
Setup [F2]: Advanced -> ACPI Configuration -> Select ACPI Reset Mode
Available options: Hard Reset (Default), Full Reset (Hard Reset with full Power Cycle)
New mode “Full Reset” can fix restart problems of some devices.– Updated UEFI Shell command ekfflash to version 1.7
– Re-enabled boot from Intel SATA controller when configured as RAID controller (disabled in #190)
– Extended color selection of UEFI Shell commmand cls
– Improved setup of custom specific defaults
===================================================================================================================
2017-06-08: BIOS release, Build #190 production
– Added support for a virtual battery
Setup [F2]: Advanced -> SMART Battery Configuration -> ACPI Virtual Battery
Available options: Disabled (Default), Enabled– Added support to select ACPI Power State
Setup [F2]: Advanced -> ACPI Configuration -> Select ACPI Power State
Available options: CompactPCI (Default), force battery or force AC– Smart battery support is only enabled if CPU board is inserted in System Slot
– Supported boot from JMicron SATA controller
Setup [F2]: Advanced -> SATA Configuration -> JMicron SATA Configuration -> Expansion ROM for JMB36X
Available options: Disabled (Default),
V1.06.75 (JMicron ROM version V1.06.75): supports IDE, AHCI and RAID
V1.07.00 (JMicron ROM version V1.07.00): supports AHCI and RAID– Build ID table for CompactPCI peripheral boards and check for valid EEPROM on peripheral boards
only if CPU board is inserted in System Slot– Added SY8-VMM, SU1-TWIST, SU2-BALLAD, SK9-TUNE, SK4-WALTZ, CUE-BALLAD and CVX-DVI in list of installed EKF boards
– Changed Setup options to execute a fixed delay at the early beginning of POST
Setup (F2): Advanced -> Miscellaneous Configuration -> Execute Delay after Reset
Available options are: Disabled (no delay), 100ms (Default), 250ms, 500ms, 1s, 4s or 12s
If enabled, it allows certain devices to finish its internal initialization before
POST has access to these devices. The delay is indicated by a red blinking LED GP
in front panel of PC3-ALLEGRO.– Disabled access of SMBUS devices on CompactPCI if CPU board is not inserted in System Slot
– Issued a message if Setup Defaults have been loaded
– Issued a error message if detection or initialization of hardware monitor LM87 failed
– Added Setup node to control locked transactions through CompactPCI bridge PLX8112
Setup [F2]: Advanced -> CompactPCI Configuration -> Locked Transactions
Available options: Disabled (Default), Enabled– Added UEFI Shell command ekfpci
– Updated UEFI Shell command ekfflash to version 1.4
– Always execute a delay of 100 ms after reset before doing any IO access
– Changed SMBIOS System Serial Number from “00000000” to “Not available”
– If more than 12 GB is installed, Intel XHCI controller and Intel ME device are only
assigned 32-bit resources to avoid a hang in system– Extended UEFI Shell command ekfma
– Added some UEFI Shell command aliases
===================================================================================================================
2016-07-04: BIOS release, Build #180 production
– Added Setup node to show CPU maximum junction temperature
Setup [F2]: Advanced -> Processor Configuration -> CPU Maximum Junction Temperature– Added Setup node to select the CPU internal TCC activation temperature
Setup [F2]: Advanced -> Processor Configuration -> Select TCC Activation Temperature– Changed the generation of the UUID (Universal Unique ID number) in SMBIOS table
The new algorithm ensures that the UUID is now really unique.– Added Shell command eflash
– Added feature “Advanced CPU speed control”
Use the following Setup nodes to control this:
Setup [F2]: Advanced -> Processor Configuration -> Advanced CPU Speed Control
Available options: Disabled (Default), Range, Fixed
Default: Use CPU defaults for low and high speed limits (LFM and HFM)
Range: Select low and high speed limits per Setup nodes
Setup [F2]: Advanced -> Processor Configuration -> Select CPU Speed Range Low
Setup [F2]: Advanced -> Processor Configuration -> Select CPU Speed Range High
Fixed: Select a fixed CPU frequency per Setup node
Setup [F2]: Advanced -> Processor Configuration -> Select fixed CPU Speed– Show real CPU frequency in Setup Main (instead of HFM frequency)
– Adapted CompactPCI PlusIO Slots in SMBIOS table
– Reported CPU board revision in SMBIOS table
– Reported CPU board serial number in SMBIOS table
– Reported support for Smart Batteries (via EKF-SBX) in SMBIOS table
– Show board serial number in Setup -> Main -> System Information -> Board Type
– Disabled access of SMBUS devices on CompactPCI, if CPU board is not inserted in System Slot
– Issued an appropriate message during POST if CPU is installed in a peripheral slot
– Enabled AES Support inside Intel processor
– Added Setup node to allow selection of PCI clock speed on CompactPCI
Setup [F2]: Advanced -> CompactPCI Configuration -> CompactPCI Bus Frequency
Available options: 50 MHz, 33 MHz (66 MHz if supported by hardware), 25 MHz, 20 MHz or 10 MHz
Default bus frequency is 33 MHz.– Improved performance and transfer speed over CompactPCI classic
This feature can be controlled with three new Setup nodes:
Setup [F2]: Advanced -> CompactPCI Configuration -> Cacheline Size of PLX 8112
Setup [F2]: Advanced -> CompactPCI Configuration -> Maximum Read Request Size
Setup [F2]: Advanced -> CompactPCI Configuration -> Programmed Prefetch Size
For more information about optimized settings read datasheet of PCI bridge PLX 8112.– Changed default Intel xHCI Mode from “Smart Auto” to “Auto” to prevent a BIOS hang up during a Reboot
Setup [F2]: Advanced -> USB Configuration (Intel) -> xHCI Mode– Issued a warning message if EKF Manufacturing Jumper is set at restart of the system
– Issued a warning message if EKF Jumper GP is set
– Issued a warning message if Intel Management platform is still in Manufacturing mode
– Fixed a bug when loading defaults (F9 key) in Setup Boot Menu
– Added SE1-PITCH, SN5-TOMBAK, SPX-PHASE and SE2-MOOD in list of installed EKF boards
===================================================================================================================
2015-09-30: BIOS release, Build #174 production
– Suppress power failure message if 12V is not provided
Setup [F2]: Advanced -> Board Configuration -> Check for CompactPCI PlusIO 12V
Available options: Disabled, Enabled (Default)
In case the CompactPCI PlusIO system does not provide 12V power, it is desirable to suppress
the appropriate power failure message. To do this, set this item to Disabled.– Added SK3-MEDLEY, SF1-STUDIO, SB3-TONE and EB3-TONE in list of installed EKF boards
– Added support for custom specific default boot tables
– When loading Setup Defaults (F9), attributes for Boot Options are now set to default
===================================================================================================================
2015-08-06: BIOS release, Build #170 production
– Added support for Intel Virtualization Technology for Directed I/O
Setup [F2]: Advanced -> Processor Configuration -> VT for Directed I/O (Intel VT-d)
Available options: Disabled (Default), Enabled
http://www.intel.com/content/www/us/en/embedded/technology/virtualization/vt-directed-io-spec.html– Report PLD watchdog timeout via SMBIOS event log
Any reset caused by a PLD watchdog timeout will be saved in SMBIOS event log (SMBIOS type 15)
and can be viewed later at any time, e.g. in BIOS Setup:
Setup [F2]: Advanced -> SMBIOS Event Log -> View SMBIOS event log– Report board power failure via SMBIOS event log
Any reset caused by a board power failure will be saved in SMBIOS event log (SMBIOS type 15)
and can be viewed later at any time, e.g. in BIOS Setup:
Setup [F2]: Advanced -> SMBIOS Event Log -> View SMBIOS event log– No stop in POST if error “board power failure” occured, cause this error is now saved in SMBIOS event log
– Sticky bits of PLD status regs are now cleared during POST (valid for PLD revision >= 24)
– Convert SMBIOS log date from month/day/year format to international standard ISO 8601
– Fixed a bug in SMBIOS event logging when log buffer is full
SMBIOS log buffer in NVRAM can log up to 222 SMBIOS events– Even if UEFI boot is disabled via BIOS Setup, it is now possible to enter BIOS Setup or to call Boot Menu
– Added setup item to allow to ignore VGA UEFI Options ROMs
Setup [F2]: Advanced -> Graphics Configuration -> VGA Graphics UEFI Option ROMs
Available options: Ignored (Default), Enabled– Corrected revision number of SK2-SESSION Rev.0 in list of installed EKF boards
– Added Setup item to skip the check for an Active Boot Partition in the MBR (Master Boot Record)
Setup [F2]: Main -> Boot Features -> Check for Active Boot Partition
Available options: Disabled, Enabled (Default)
Disabling this check allows to boot from a device which has a MBR without a partition table or
to boot from a device with a partition table where none of the four entries is marked as active.===================================================================================================================
2015-06-09: BIOS release, Build #166 production
– Extended ACPI PCI bus support from 63 (0x3F) buses to 256 (0x100) buses (with PCI bus numbers from 0-255)
– Removed unsupported options of Setup node “Primary Display Selection”
Setup [F2]: Advanced -> Graphics Configuration -> Primary Display Selection
Available options: Intel GD (Default), Auto– Changed RTC default year to 2015
===================================================================================================================
2015-04-15: BIOS release, Build #164 production
– Added display of User ID in Setup
Setup [F2]: Main -> System Information -> User ID– Load customer defaults on F9 key in Setup, if EEPROM User-ID matches assigned Customer-ID
– Changed default value for Primary VGA device to Intel IGD
Setup [F2]: Advanced -> Graphics Configuration -> Primary Display Selection– Added check for valid Configuration Data in EEPROM on EKF PC3-ALLEGRO
If unvalid configuration data is detected, an appropriate error message is shown.– Added check for valid User/Custom data in EEPROM on EKF PC3-ALLEGRO
If unvalid user/custom data is detected, an appropriate error message is shown.– Supported EKF SD1-DISCO Rev.3 in list of installed EKF boards
– Fixed a problem with EKF peripheral boards with trailing spaces behind its boardname in EEPROM configuration data
===================================================================================================================
2015-03-31: BIOS release, Build #160 production
– A CPU exception, occured during POST, is now indicated by a red blinking LED GP in front panel of EKF PC3-ALLEGRO
– Optionally generate an NMI if an ECC memory error occured
This feature can be controlled by the following Setup option:
Setup [F2]: Advanced -> Memory Configuration -> NMI on ECC Error
Available options: Disabled (Default), Single Bit, Multiple Bit, Both– Added boot support for all detected (non-Intel) SATA Devices
All boot devices can now be selected in boot menu (F11 key) and in Setup [F2]: Boot
Marvell SATA Devices are now shown as “Marvell SATA: A0Sx” in bootlist. – Added check for valid EEPROM configuration data on all EKF CompactPCI peripheral boards
If unvalid configuration data is detected, an appropriate error message is shown.
The check can be controlled by the following Setup option:
Setup [F2]: Advanced -> Miscellaneous Configuration -> Check for valid EEPROM data
Available options: Disabled, Enabled (Default)– For diagnostic purposes green LED GP is switched on during initialization of the platform
This results in a short LED flash (0.1 s – 0.5 s) at the early beginning of POST– Diagnostic Screen is constantly shown if
key is pressed during POST – Added SMBIOS structures for PCH PCI Express Ports 6-8
– Show list of installed EKF peripheral boards during POST
To show a correct list, the following Setup Options must be set appropriate to the system
Setup (F2): Advanced -> Miscellaneous Configuration -> Select System Slot Position
Available options: Left (Default), Right
Setup (F2): Advanced -> Miscellaneous Configuration -> Select number of Slots on Bus
Available options: 1-9– Show an error message if last system reset was caused by a Power Failure
Details of a power failure are shown in Setup
Setup [F2]: Main -> System Information -> Power Status– Added Setup option to execute a fixed delay at the early beginning of POST
Setup (F2): Advanced -> Miscellaneous Configuration -> Execute Delay after Reset
Available options are: Disabled (no delay, Default), 1s, 4s or 12s
If enabled, it allows certain devices to finish its internal initialization before
POST has access to these devices. The delay is indicated by a red blinking LED GP
in front panel of PC3-ALLEGRO.– Added feature to select function of red button in front panel ejector
Setup [F2]: Advanced -> Board Configuration -> Function of front panel ejector
Available options for PLD Rev >= 12: None, Power (Default), Reset
Available options for PLD Rev < 12: None, Power (Default) - Show revision number of on-board PLD (Programmable Logic Device) Setup [F2]: Main -> System Information -> PLD Revision– Show extended information on Intel USB Configuration help screen
– Added an ACPI AC Device to show OS that the system is on AC or system is on battery
– Disabled xHCI boot support to avoid hangs during POST when a non-Intel xHCI (USB 3.0) controller is detected
– Updated DOS utility progspi.exe to V3.9
– Added Setup nodes to control up to four ACPI Smart Batteries
Setup [F2]: Advanced -> SMART Battery Configuration -> ACPI Smart Battery 1-4
Available options: Auto (Default), Disabled, Forced– Added Setup node to control EKF SBX-DUB
Setup [F2]: Advanced -> SMART Battery Configuration -> CPCI-S Slot of SBX-DUB
Available options: Auto (Default), Slot GA [0-7]
An error message is shown if EKF SBX-DUB is expected but not found.– An error message is shown if EEPROM of EKF SBX-DUB is not correctly programmed
– Added ACPI support for Smart Batteries connected to SMBus switch of EKF SBX-DUB
If no SBX-DUB is detected, Smart Battery devices are not available in OS– Added EKF Shell command ’ema’ (EKF Memory Access)
Allows to measure memory access speed.– Added Setup node to control SMBus routing to CompactPCI
Setup [F2]: Advanced -> Board Configuration -> SMBus to CompactPCI
Available options: Disabled, Auto (Default), Enabled– Added Setup node to control SMBus routing to an EKF Sideboard
Setup [F2]: Advanced -> Board Configuration -> SMBus to EKF Sideboard
Available options: Disabled, Auto (Default), Enabled===================================================================================================================
2014-10-24: BIOS release, Build #144 production
– Fixed an USB memory allocation failure
– Added capability to transfer data over CompactPCI with 64 bit addresses
Setup [F2]: Advanced -> CompactPCI Configuration -> 64 Bit Prefetch Address Capability
Available options: Disabled, Enabled (Default)
Note: This item must be enabled for all 64 Bit Operating Systems and Drivers which uses
64 Bit addresses to transfer data over 32 Bit CompactPCI bus.– Reset all entries in Setup menu “Boot” to factory defaults, if jumper “GP” is set during POST
– Extended hotkey string at bottom of POST screen for UEFI Shell (F5)
– Prohibit any try of an OS to initiate a SPI Flash Update via UEFI services
– If QuickBoot is enabled in BIOS Setup, Setup node “Load OPROM” is now suppressed
– Bits 7-0 of POST Codes now written to Port 80 AND to Port 84
Bits 15-8 of POST Codes written to Port 85 only– Extended Setup node which selects timeout for a SATA device attached to Intel SATA Controller
Setup [F2]: Advanced -> SATA Configuration -> Timeout for Device Ready
Available options: 500ms, 3s, 6s, 9s, 12s (Default), 15s, 20s, 30s, 45s, 60s
The selected timeout is the maximum time waiting for a SATA device to become ready.
This option is only valid if Intel SATA controller interface mode is “AHCI” or “RAID”.– Extended Setup node which selects timeout after the UEFI Boot Manager invokes a Boot Option
Setup [F2]: Main -> Boot Features -> Select Timeout for Boot Option
Available options: Disabled (Default), 5s, 10s, 20s, 30s, 45s, 1 min, 2 min, 5 min, 10 min, 30 min===================================================================================================================
2014-09-04: BIOS release, Build #142 production
– Added Setup node to select the CacheLine Size of a PCI controller in CompactPCI slots with device numbers 9-15
Setup [F2]: Advanced -> CompactPCI Configuration -> Cacheline Size of Slot Dev #[9-15]– Added Setup node to select the PCI Latency Timer of a PCI controller in CompactPCI slots with device numbers 9-15
Setup [F2]: Advanced -> CompactPCI Configuration -> PCI Latency Timer of Slot Dev #[9-15]– Fixed: All ME Setup nodes are now read-only if BIOS Setup is entered in User mode
Setup [F2]: Security -> Set User Password– Updated DOS utility progspi.exe to V3.8
Refused programming and verifying of Atmel SPIs.===================================================================================================================
2014-08-14: BIOS release, Build #140 production
– If a RTC Reset is detected, the initialization of RTC date and time registers to default values is now skipped
– Added Setup node to select timeout for a SATA device attached to Intel SATA Controller.
Setup [F2]: Advanced -> SATA Configuration -> Timeout for Device Ready
Available options: 500ms, 3s, 6s, 9s, 12s (Default), 15s, 20s, 30s
The selected timeout is the maximum time waiting for a SATA device to become ready.
This option is only valid if Intel SATA controller interface mode is “AHCI” or “RAID”.– Added Setup node to select timeout for an IDE device attached to Intel SATA Controller.
Setup [F2]: Advanced -> SATA Configuration -> Timeout for Dev Not Busy
Available options: 500ms, 2s, 5s, 10s (Default), 20s, 31s
The selected timeout is the maximum time waiting for an IDE device to be not busy.
This option is only valid if Intel SATA controller interface mode is “IDE”.– Added full RAID support for Intel SATA Controller
Setup [F2]: Advanced -> SATA Configuration -> Interface Mode
Available options: IDE, AHCI (Default), RAID
For RAID support select “RAID” and press CTRL-I during POST to configure an Intel RAID system– Extended AHCI and RAID Software Features
Setup [F2]: Advanced -> SATA Configuration -> AHCI/RAID Software Config
Not all Setup items in this menu can be selected if Intel SATA controller mode is set to AHCI.– Disabled feature “Locate SATA Device” per LED
– Restructured “Summary Screen”. “Summary Screen” is shown at end of POST if Setup node
Setup [F2]: Main -> Diagnostic Summary Screen
is set to “Enabled”.– Additionally show Help Screen of a Setup item as a Pop-Up Window (F1 key)
This allows to show much more information for a specific Setup item– Updated DOS utility progspi.exe to V3.6
===================================================================================================================
2014-06-05: BIOS release, Build #138 production
– Added support for PS/2 Keyboard and Mouse
PS/2 is automatically enabled if a Super-IO (SIO) of type SMSC SCH3114 is detected on an EKF Expansion board.– Stretching on Sleep signals after SUS well power failure is now enabled per default
Setup [F2]: Advanced -> Board Configuration -> SLP Stretching after SUS Power Up
If this option is disabled, the detection of certain peripheral boards failed sometimes.
Enabling this option has the disadvantage that boot time after power-up increases slightly.– Reset system if the reset is initiated by a command to the possibly non-existing keyboard controller. This
solves the Windows XP restart problem, which occurs if no SIO (Super-IO) is installed in the system.– Added support to control serial ports A-D on an EKF Expansion board via BIOS Setup
Setup [F2]: Advanced -> Super-IO Configuration -> Serial Port [A-D]
Available options: Disabled, Enabled (Default)
Every physical serial port can be mapped to one of four IO base addresses
Setup [F2]: Advanced -> Super-IO Configuration -> IO Base
Available options: 3F8 (COM1), 2F8 (COM2), 3E8 (COM3), 2E8 (COM4)
Setup [F2]: Advanced -> Super-IO Configuration -> IRQ
Available options: 3, 4, 7, 11 and 15– Fixed an issue with serial port detection on an EKF Expansion board, i.e. selecting BIOS defaults
during BIOS setup (F9 key) is not necessary to reenable SIO devices after a temporary SIO removal.– Added support for BIOS Write Protection
Setup [F2]: Advanced -> Board Configuration -> BIOS Write Lock
Available options: Disabled (Default), Enabled
If this item is set to Enabled, the whole BIOS region (part of the on-board SPI Flash) is write protected
for every software which tries to write to the BIOS. The write protection can only be removed by setting
a jumper on the board.– Improved description and modified structure of Setup nodes in Security menu
Setup [F2]: Security– Now all Setup nodes are read-only if BIOS setup is entered in User mode
Setup [F2]: Security -> Set User Password===================================================================================================================
2014-05-19: BIOS release, Build #136 production
– Added support for serial ports COM3 and COM4 of Super-IO SMSC SCH3114 on EKF Expansion boards
– Added Setup node to select top of memory below 4G
Setup [F2]: Advanced -> Memory Configuration -> Select maximum TOLUD
Decrease value if a peripheral board needs more MMIO space.– Disabled support for MMIO above 4G
– Added Setup node to allow a delay before SA PCI Express initialization starts
Setup [F2]: Advanced -> PCI Express Configuration -> SA PCI Express Miscellaneous Configuration -> Delay before PCIe initialization
Available options: Disabled, 10 ms (Default), 100 ms, 500 ms
Note: Don’t confuse this delay with the general and always executed 100 ms delay from end of reset to
first PCI Express configuration cycle. The delay selected by this Setup item is an additional delay.– Added initialization of MaxPayload and CommonClock setting for SA PCI Express ports
– Added Setup node to skip loading of options ROMs of AMD graphics controller
Setup [F2]: Advanced -> Graphics Configuration -> Load AMD Option ROMs
Available options: Disabled (Default), Enabled
AMD graphic options ROMs are installed on MXM modules used on EKF SV1-CLIP– Added Setup node to skip loading of options ROMs of Nvidia graphics controller
Setup [F2]: Advanced -> Graphics Configuration -> Load NVIDIA Option ROMs
Available options: Disabled (Default), Enabled
Nvidia graphic options ROMs are installed on MXM modules used on EKF SV1-CLIP– Added Setup node to skip loading of options ROMs of Silicon Motion graphics controller
Setup [F2]: Advanced -> Graphics Configuration -> Load NVIDIA Option ROMs
Available options: Disabled (Default), Enabled
Silicon Motion options ROMs are installed on e.g. XMC graphics module EKF DV1-DRAGON– Fixed an issue with writable PCI vendor IDs
===================================================================================================================
2014-03-31: BIOS release, Build #134 production
– Added Board configuration menu
Setup [F2]: Advanced -> Board Configuration -> SMBus Device
Setup [F2]: Advanced -> Board Configuration -> SB Configuration -> PCH Sleep S3 Min Assert
Setup [F2]: Advanced -> Board Configuration -> SB Configuration -> PCH Sleep S4 Min Assert
Setup [F2]: Advanced -> Board Configuration -> Processor Configuration -> Automatic Thermal Control– Added separate configuration menus for SA (System Agent) PCI Express Ports 1-3
Setup [F2]: Advanced -> PCI Express Configuration -> SA PCI Express Port Configuration– Added Setup node to enable or disable SA PCI Express Port 1
Setup [F2]: Advanced -> PCI Express Configuration -> SA PCI Express Port Configuration -> Control SA PCI Express Port 1
Available options: Disabled, Enabled (Default)
This port is routed to on-board bridge device PEX8608 used for EKF sideboards– Added Setup node to enable or disable SA PCI Express Port 2
Setup [F2]: Advanced -> PCI Express Configuration -> SA PCI Express Port Configuration -> Control SA PCI Express Port 2
Available options: Disabled, Enabled (Default)
This port is routed to on-board SATA controller Marvell 88SE9230– Added Setup node to enable or disable SA PCI Express Port 3
Setup [F2]: Advanced -> PCI Express Configuration -> SA PCI Express Port Configuration -> Control SA PCI Express Port 3
Available options: Disabled, Enabled (Default)
This port is routed to on-board bridge device PEX8112 used for CompactPCI Classic– Removed Setup node “State After G3”, cause PC3-ALLEGRO always goes to state S0 after G3
– Added Setup node to select timeout after the UEFI Boot Manager invokes a Boot Option
Setup [F2]: Main -> Boot Features -> Select Timeout for Boot Option
Available options: Disabled (Default), 1 min, 5 minutes, 30 minutes
Previously timeout was fixed to 5 minutes, so board was rebooted after 5 minutes when e.g. in Setup– Fixed a bug which caused some CPU variables not saved during BIOS Setup
===================================================================================================================
2014-03-20: BIOS release, Build #132 production
– Fixed a bug in SIO detection, Serial COM ports sometimes not detected
===================================================================================================================
2014-03-07: BIOS release, Build #130 production
– Removed unfeasible Phoenix/Microsoft “feature” which disables USB support in the BIOS. This occurred after
a Windows Vista/7/8 installation in UEFI mode: Setup [F2]: Main -> Boot Features -> Boot Priority -> UEFI First
With Build #130 USB is always enabled, even if Microsofts Windows Boot Manager is installed.– If no EKF Expansion board is installed in the system, all SIO devices will now be disabled in ACPI table.
– Added support for ACPI thermal management. This is used for ACPI passive cooling and critical temperature
selection. Granularity and tolerance of ACPI temperature management is 4 degree Celsius.
Setup [F2]: Advanced -> ACPI Configuration -> ACPI management for TZ00
Available options are: Disabled, Enabled (Default)
Setting this item to Disabled, returns fixed temperature 30 deg C from ACPI thermal zone TZ00.– Added setup node to control ACPI Critical Trip Point
Setup [F2]: Advanced -> ACPI Configuration -> Critical Trip Point:
The trip point can be changed in one degree steps from 50-120 degree Celsius.
Default value is 108 degree Celsius.– ACPI passive cooling allows to limit the maximum value for the CPU internal temperature via BIOS Setup.
If the selected temperature is reached, CPU voltage and clock speed is reduced to cool down the processor.
This setup item allows to control ACPI Passive Cooling Trip Point:
Setup [F2]: Advanced -> ACPI Configuration -> Passive Cooling Trip Point
The trip point can be changed in one degree steps from 30-105 degree Celsius.
Default value is 100 degree Celsius.– Added setup nodes to control ACPI passive cooling constants
Setup [F2]: Advanced -> ACPI Configuration -> Passive TC1 value:
Setup [F2]: Advanced -> ACPI Configuration -> Passive TC2 value:
Setup [F2]: Advanced -> ACPI Configuration -> Passive TSP value:
For more information about these settings read http://www.acpi.info/spec.htm– Added setup node to control Sleep Stretching after SUS Well Power Up
Setup [F2]: Advanced -> SB Configuration -> SLP Stretching after SUS PowUp
Available options: Disabled (Phoenix Default), Enabled– Added setup node to control Sleep S3 Minimum Assertion Width
Setup [F2]: Advanced -> SB Configuration -> PCH Sleep S3 Min Assert
Available options: 60us, 2ms, 50ms (Default), 2s– Added setup node to control Sleep S4 Minimum Assertion Width
Setup [F2]: Advanced -> SB Configuration -> PCH Sleep S4 Min Assert
Available options: EDS, 1s (Default), 2s, 3s, 4s===================================================================================================================
2014-02-24: BIOS release, Build #128 production
– Added support for serial COM ports of Super-IO SMSC SCH3114 on EKF Expansion boards.
Supported are:
– COM port A (COM1) in front panel (bottom) of EKF CCI-RAP, CCO-CONCERT or PCS-BALLET
– COM port B (COM2) in front panel (top) of EKF CCI-RAP or CCO-CONCERT===================================================================================================================
2014-01-28: BIOS release, Build #126 production
– Enabled Intel Management Engine (ME) by default
Note: If EKF PC3-ALLEGRO is equipped with SPIs (Flash Memory) of type Atmel, enabling Intel ME firmware can
lead to problems under certain circumstances. The reason is that Intel ME firmware V8.x.xx.xx for Ivy Bridge
chipsets unfortunately does not correctly support SPIs from Atmel. Other types of SPIs (e.g. from Winbond, EON
or Macronix) are not affected. Contact EKF for further information.– Changed default mode for Setup option “Load OPROMs” to “All”
Setup [F2]: Main -> Boot Features -> Load ORPOM -> [All | On Demand]– More information about installed Memory in BIOS Setup
Setup [F2]: Main -> System Information– Several cosmetic modifications in BIOS Setup
– Modified Intel Video BIOS V2169 (now EKF Version 2) to support DisplayPort on EKF PCS-BALLET
– Removed support for SDVO (DVI) on EKF CCO-CONCERT
– Fixed issue with legacy interrupt routing on SA PCIe Port 1 (-> Marvell) and SA PCIe Port 2 (-> CompactPCI Classic)
===================================================================================================================
2013-11-11: BIOS release, Build #124 production
– PCH internal Ethernet Controller (top RJ45) is now always existent, even after a Power Cycle
– Supported PC3-ALLEGRO special ICC profile (with Spread Spectrum Off), if ME File System is valid.
– PCH PCI Device 22 (ME #1) is always disabled, no yellow exclamation mark under Windows
– UEFI Shell: Added new option -n (show only variable names) for utility dmpstore
– Improved Restart capability when an USB Keyboard with an integrated Hub is installed
– Make call to Setup (F2 key during POST) an “bootable” entry in BIOS Setup menu “Boot”
– Make call to Boot Menu (F11 key during POST) an “bootable” entry in BIOS Setup menu “Boot”
– UEFI Shell can be called with key F5 during POST
– Diagnostic Splash screen can be called with key F4 during POST
– Avoided the setting of the Run/Stop bit of all EHCI controllers of type Pericom PI7C9X442SL found in the system
===================================================================================================================
2013-08-09: BIOS release, Build #120 production
– First BIOS release for EKF PC3-ALLEGRO
===================================================================================================================
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Expansion Modules
Specifications
- J1 Connector for Full CompactPCI® Classic 32-Bit Support
- J2 Connector (UHM High Speed) for CompactPCI® PlusIO Support
- 4 x PCIe
- 4 x SATA
- 4 x USB
- 2 x GbE
Simplified Block Diagram