SC1-ALLEGRO
CompactPCI® Serial CPU Card • 3rd Generation Intel® Core™ i7-3xxx Processor
The SC1-ALLEGRO is a rich featured high performance 4HP/3U CompactPCI® Serial CPU board, equipped with an Intel® Core™ i7 Ivy Bridge + ECC (dual- or quad-core) mobile processor based on 22nm technology. The SC1-ALLEGRO front panel is provided with two Gigabit Ethernet jacks, two USB 3.0 receptacles, and two Mini-DisplayPort connectors for attachment of high resolution digital displays, configured e.g. as extended desktop.
The SC1-ALLEGRO is equipped with up to 16GB RAM with ECC support. 8GB memory-down are provided for rugged applications, and another 8GB are available via the DDR3 ECC SO-DIMM socket. As an option, a low profile mezzanine module with dual mSATA SSDs may serve as a high-speed RAID mass storage solution. The SC1-ALLEGRO backplane connectors comply with the PICMG® CompactPCI® Serial system slot specification.
The SC1-ALLEGRO is equipped with a set of local expansion interface connectors, which can be optionally used to attach a mezzanine side board. A variety of expansion cards is available, e.g. providing legacy I/O and additional PCI Express® based I/O controllers such as SATA, USB 3.0 and Gigabit Ethernet, or a third video output. Most mezzanine side cards can accommodate in addition a 2.5-inch drive.
Typically, the SC1-ALLEGRO and the related side card would come as a readily assembled 8HP unit. As an alternate, low profile Flash based mezzanine storage modules are available that fit on the SC1-ALLEGRO while maintaining the 4HP profile. The C42-SATA module e.g. is equipped with a very fast 1.8-inch SATA Solid State Drive (SSD), which is suitable for installation of any popular operating system.
While mechanically compliant to CompactPCI® Classic, CompactPCI® Serial (PICMG® CPCIS.0) defines a completely new card slot, based on PCI Express®, SATA, Gigabit Ethernet and USB serial data lines. Up to 6 high-speed backplane connectors P1 – P6 are provided on a system slot controller such as the SC1-ALLEGRO, which can be considered as a root hub with respect to most signal lines. A passive backplane is used for distribution of a defined subset of I/O channels from the system slot to each of up to eight peripheral slots in a CompactPCI® Serial system.
Most CompactPCI® Serial peripheral slot cards require only the backplane connector P1, which comprises PCIe, SATA and USB signals, resulting in a concise and inexpensive peripheral board design. More powerful peripheral cards profit from so called Fat Pipe slots (PCIe x 8). The SC1-ALLEGRO is a native CompactPCI® Serial CPU card, suitable for usage in a pure CPCI Serial environment. Due to its generous backplane capabilities (20 x PCI Express® lanes, 6 x USB, 7 x SATA, 2 x GbE), very powerful industrial systems can be built.
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Release Notes
=================================================
Release Notes for Phoenix BIOS on EKF SC1-ALLEGRO
=================================================This file describes changes, extensions and bug fixes made in Phoenix BIOS
for EKF SC1-ALLEGRO. For any further questions contact EKF at:
Email : support@ekf.de
Internet : www.ekf.com===================================================================================================================
2020-01-23: UEFI/BIOS release, Build #200 production
– Added support for Secure Boot
Setup [F2]: Security -> Secure Boot Configuration
Note: A password must be set before this menu can be selected– Enabled Setup node to control the CSM
Setup [F2]: Main -> Boot Features -> CSM Support
Available options: Yes (Default), No
The CSM module (Compatibility Support Module) provides backward compatibility services for legacy OS or Expansion ROMs.– Implemented GOP driver version 3.0.13.1013
– Adapted Video BIOS table to EKF hardware for GOP driver
– Fixed an UEFI internal bug in communication buffer handling
– Added SX6-FIREWORKS in list of installed EKF boards
– Aborted loading of drivers in UEFI Shell if a security violation is detected
===================================================================================================================
2019-07-26: BIOS release, Build #196 production
– Updated IvyBridge CPU microcode (CPUID 0x306A9) with version 33 (February 2019)
– Added feature to perform an additional CPU and Board Reset after the system was powered-on
Setup (F2): Advanced -> Miscellaneous Configuration -> Reset after Power-On
Available options: Disabled (Default), PEI Phase, DXE Phase
Setup (F2): Advanced -> Miscellaneous Configuration -> Type of Reset after Power-On
Available options: Hard Reset (Default), Full Reset– Fixed a bug when Setup mode for SMBus routing to CompactPCI was set to “Enabled”
Setup [F2]: Advanced -> Board Configuration -> SMBus to CompactPCI Serial===================================================================================================================
2019-04-17: BIOS release, Build #194 production
– Updated IvyBridge CPU microcode (CPUID 0x306A9) with version 31 (April 2018)
– UEFI Shell: Added new option for Shell command ekfpci (alias p)
Option -l3 shows PCI buses occupied by PCI bridges– UEFI Shell: Fixed a bug in Shell command “reset”
Option -c now really performs a cold reset– UEFI Shell: Added feature to measure memory write speed in command ekfma
– Added SX5-STREAM, SA4-COUNTRY, SRF-FAN, SCL-RHYTHM, SK5-BALL, SL6-COMBO, SBF-CROSSOVER,
SXP-JAM, SPY-RIG, SU3-ENSEMBLE and SU5-ENSEMBLE in list of installed EKF boards– Changed default of option ‘PME SCI’ of PCH PCI Express Root Port 8 to Enabled
Setup (F2): Advanced -> PCI Express Configuration -> PCH PCI Express Root Port 8 Configuration -> PME SCI===================================================================================================================
2017-09-07: BIOS release, Build #192 production
– Added SE4-TEMPO and EK4-WALTZ in list of installed EKF boards
– Added Setup option to select ACPI Reset Mode (used for OS Restart)
Setup [F2]: Advanced -> ACPI Configuration -> Select ACPI Reset Mode
Available options: Hard Reset (Default), Full Reset (Hard Reset with full Power Cycle)
New mode “Full Reset” can fix restart problems of some devices.– Updated UEFI Shell command ekfflash to version 1.7
– Re-enabled boot from Intel SATA controller when configured as RAID controller (disabled in #190)
– Extended color selection of UEFI Shell commmand cls
– Improved setup of custom specific defaults
===================================================================================================================
2017-06-08: BIOS release, Build #190 production
– Added support for a virtual battery
Setup [F2]: Advanced -> SMART Battery Configuration -> ACPI Virtual Battery
Available options: Disabled (Default), Enabled– Added support to select ACPI Power State
Setup [F2]: Advanced -> ACPI Configuration -> Select ACPI Power State
Available options: CompactPCI (Default), force battery or force AC– Smart battery support is only enabled if CPU board is inserted in System Slot
– Supported boot from JMicron SATA controller
Setup [F2]: Advanced -> SATA Configuration -> JMicron SATA Configuration -> Expansion ROM for JMB36X
Available options: Disabled (Default),
V1.06.75 (JMicron ROM version V1.06.75): supports IDE, AHCI and RAID
V1.07.00 (JMicron ROM version V1.07.00): supports AHCI and RAID– Build ID table for CompactPCI peripheral boards and check for valid EEPROM on peripheral boards
only if CPU board is inserted in System Slot– Added SY8-VMM, SU1-TWIST, SU2-BALLAD, SK9-TUNE and SK4-WALTZ in list of installed EKF boards
– Changed Setup options to execute a fixed delay at the early beginning of POST
Setup (F2): Advanced -> Miscellaneous Configuration -> Execute Delay after Reset
Available options are: Disabled (no delay), 100ms (Default), 250ms, 500ms, 1s, 4s or 12s
If enabled, it allows certain devices to finish its internal initialization before
POST has access to these devices. The delay is indicated by a red blinking LED GP
in front panel of SC1-ALLEGRO.– Disabled access of SMBUS devices on CompactPCI if CPU board is not inserted in System Slot
– Issued a message if Setup Defaults have been loaded
– Issued a error message if detection or initialization of hardware monitor LM87 failed
– Added UEFI Shell command ekfpci
– Updated UEFI Shell command ekfflash to version 1.4
– Always execute a delay of 100 ms after reset before doing any IO access
– Changed SMBIOS System Serial Number from “00000000” to “Not available”
– If more than 12 GB is installed, Intel XHCI controller and Intel ME device are only
assigned 32-bit resources to avoid a hang in system– Extended UEFI Shell command ekfma
– Added some UEFI Shell command aliases
===================================================================================================================
2016-07-04: BIOS release, Build #180 production
– Added Setup node to show CPU maximum junction temperature
Setup [F2]: Advanced -> Processor Configuration -> CPU Maximum Junction Temperature– Added Setup node to select the CPU internal TCC activation temperature
Setup [F2]: Advanced -> Processor Configuration -> Select TCC Activation Temperature– Changed the generation of the UUID (Universal Unique ID number) in SMBIOS table
The new algorithm ensures that the UUID is now really unique.– Added Shell command eflash
– Added feature “Advanced CPU speed control”
Use the following Setup nodes to control this:
Setup [F2]: Advanced -> Processor Configuration -> Advanced CPU Speed Control
Available options: Disabled (Default), Range, Fixed
Default: Use CPU defaults for low and high speed limits (LFM and HFM)
Range: Select low and high speed limits per Setup nodes
Setup [F2]: Advanced -> Processor Configuration -> Select CPU Speed Range Low
Setup [F2]: Advanced -> Processor Configuration -> Select CPU Speed Range High
Fixed: Select a fixed CPU frequency per Setup node
Setup [F2]: Advanced -> Processor Configuration -> Select fixed CPU Speed– Show real CPU frequency in Setup Main (instead of HFM frequency)
– Reported CPU board revision in SMBIOS table
– Reported CPU board serial number in SMBIOS table
– Reported support for Smart Batteries (via EKF-SBX) in SMBIOS table
– Show board serial number in Setup -> Main -> System Information -> Board Type
– Disabled access of SMBUS devices on CompactPCI, if CPU board is not inserted in System Slot
– Issued an appropriate message during POST if CPU is installed in a peripheral slot
– Enabled AES Support inside Intel processor
– Changed default Intel xHCI Mode from “Smart Auto” to “Auto” to prevent a BIOS hang up during a Reboot
Setup [F2]: Advanced -> USB Configuration (Intel) -> xHCI Mode– Issued a warning message if EKF Manufacturing Jumper is set at restart of the system
– Issued a warning message if EKF Jumper GP is set
– Issued a warning message if Intel Management platform is still in Manufacturing mode
– Fixed a bug when loading defaults (F9 key) in Setup Boot Menu
– Added SE1-PITCH, SN5-TOMBAK, SPX-PHASE and SE2-MOOD in list of installed EKF boards
===================================================================================================================
2015-09-30: BIOS release, Build #174 production
– Added SK3-MEDLEY, SF1-STUDIO, SB3-TONE and EB3-TONE in list of installed EKF boards
– Added support for custom specific default boot tables
– When loading Setup Defaults (F9), attributes for Boot Options are now set to default
===================================================================================================================
2015-08-13: BIOS release, Build #172 production
– Added support for MXM output resource type TMDS for MXM DisplayPort Link A
Setup [F2]: Advanced -> Graphics Configuration -> MXM DP-A Output Resource Type
Available options are: DisplayPort (Default), TMDS===================================================================================================================
2015-08-06: BIOS release, Build #170 production
– Added support for Intel Virtualization Technology for Directed I/O
Setup [F2]: Advanced -> Processor Configuration -> VT for Directed I/O (Intel VT-d)
Available options: Disabled (Default), Enabled
http://www.intel.com/content/www/us/en/embedded/technology/virtualization/vt-directed-io-spec.html– Report PLD watchdog timeout via SMBIOS event log
Any reset caused by a PLD watchdog timeout will be saved in SMBIOS event log (SMBIOS type 15)
and can be viewed later at any time, e.g. in BIOS Setup:
Setup [F2]: Advanced -> SMBIOS Event Log -> View SMBIOS event log– Report board power failure via SMBIOS event log
Any reset caused by a board power failure will be saved in SMBIOS event log (SMBIOS type 15)
and can be viewed later at any time, e.g. in BIOS Setup:
Setup [F2]: Advanced -> SMBIOS Event Log -> View SMBIOS event log– No stop in POST if error “board power failure” occured, cause this error is now saved in SMBIOS event log
– Sticky bits of PLD status regs are now cleared during POST (valid for PLD revision >= 24)
– Convert SMBIOS log date from month/day/year format to international standard ISO 8601
– Fixed a bug in SMBIOS event logging when log buffer is full
SMBIOS log buffer in NVRAM can log up to 222 SMBIOS events– Even if UEFI boot is disabled via BIOS Setup, it is now possible to enter BIOS Setup or to call Boot Menu
– Added support for VGA Primary Devices on CompactPCI Serial Fat Pipe 2
Setup [F2]: Advanced -> Graphics Configuration -> Primary Display Selection
Available options for VGA Primary: Intel GD (Default), Fat Pipe 1, Fat Pipe 2– Added setup item to allow to ignore VGA UEFI Options ROMs
Setup [F2]: Advanced -> Graphics Configuration -> VGA Graphics UEFI Option ROMs
Available options: Ignored (Default), Enabled– Corrected revision number of SK2-SESSION Rev.0 in list of installed EKF boards
– Added Setup item to skip the check for an Active Boot Partition in the MBR (Master Boot Record)
Setup [F2]: Main -> Boot Features -> Check for Active Boot Partition
Available options: Disabled, Enabled (Default)
Disabling this check allows to boot from a device which has a MBR without a partition table or
to boot from a device with a partition table where none of the four entries is marked as active.===================================================================================================================
2015-06-09: BIOS release, Build #166 production
– Extended ACPI PCI bus support from 63 (0x3F) buses to 256 (0x100) buses (with PCI bus numbers from 0-255)
– Removed unsupported options of Setup node “Primary Display Selection”
Setup [F2]: Advanced -> Graphics Configuration -> Primary Display Selection
Available options: Intel GD (Default), Fat Pipe 1, Auto– Added INT15 support for MXM modules
This allows SV1-CLIP with NVIDIA controller Quadro K2100M to be used as Primary VGA device, if that SV1-CLIP
is inserted in CompactPCI Serial slot “Fat Pipe 1”.– Option ROMs for external VGA controller (AMD, NVIDIA, Silicon Motion) are now enabled by default
– Changed RTC default year to 2015
– Added support for SV2-MOVIE (shown on diagnostic screen and check for correct EEPROM data)
===================================================================================================================
2015-04-15: BIOS release, Build #164 production
– Added display of User ID in Setup
Setup [F2]: Main -> System Information -> User ID– Load customer defaults on F9 key in Setup, if EEPROM User-ID matches assigned Customer-ID
– Changed default value for Primary VGA device to Intel IGD
Setup [F2]: Advanced -> Graphics Configuration -> Primary Display Selection– Added check for valid Configuration Data in EEPROM on EKF SC1-ALLEGRO
If unvalid configuration data is detected, an appropriate error message is shown.– Added check for valid User/Custom data in EEPROM on EKF SC1-ALLEGRO
If unvalid user/custom data is detected, an appropriate error message is shown.– Supported EKF SD1-DISCO Rev.3 in list of installed EKF boards
===================================================================================================================
2015-03-31: BIOS release, Build #160 production
– A CPU exception, occured during POST, is now indicated by a red blinking LED GP in front panel of EKF SC1-ALLEGRO
– Optionally generate an NMI if an ECC memory error occured
This feature can be controlled by the following Setup option:
Setup [F2]: Advanced -> Memory Configuration -> NMI on ECC Error
Available options: Disabled (Default), Single Bit, Multiple Bit, Both– Added boot support for all detected (non-Intel) SATA Devices
All boot devices can now be selected in boot menu (F11 key) and in Setup [F2]: Boot
Marvell SATA Devices are now shown as “Marvell SATA: A0Sx” in bootlist. – Added check for valid EEPROM configuration data on all EKF CompactPCI peripheral boards
If unvalid configuration data is detected, an appropriate error message is shown.
The check can be controlled by the following Setup option:
Setup [F2]: Advanced -> Miscellaneous Configuration -> Check for valid EEPROM data
Available options: Disabled, Enabled (Default)– For diagnostic purposes green LED GP is switched on during initialization of the platform
This results in a short LED flash (0.1 s – 0.5 s) at the early beginning of POST– Diagnostic Screen is constantly shown if
key is pressed during POST – Show list of installed EKF peripheral boards during POST
To show a correct list, the following Setup Options must be set appropriate to the system
Setup (F2): Advanced -> Miscellaneous Configuration -> Select System Slot Position
Available options: Left (Default), Right
Setup (F2): Advanced -> Miscellaneous Configuration -> Select number of Slots on Bus
Available options: 1-25– Show an error message if last system reset was caused by a Power Failure
Details of a power failure are shown in Setup
Setup [F2]: Main -> System Information -> Power Status– Added Setup option to execute a fixed delay at the early beginning of POST
Setup (F2): Advanced -> Miscellaneous Configuration -> Execute Delay after Reset
Available options are: Disabled (no delay, Default), 1s, 4s or 12s
If enabled, it allows certain devices to finish its internal initialization before
POST has access to these devices. The delay is indicated by a red blinking LED GP
in front panel of SC1-ALLEGRO.– Added feature to select function of red button in front panel ejector
Setup [F2]: Advanced -> Board Configuration -> Function of front panel ejector
Available options for PLD Rev >= 23: None, Power (Default), Reset
Available options for PLD Rev < 23: None, Power (Default) - Show revision number of on-board PLD (Programmable Logic Device) Setup [F2]: Main -> System Information -> PLD Revision– Fixed a bug when reporting recharge current for a Smart Battery
– Show extended information on Intel USB Configuration help screen
===================================================================================================================
2015-02-19: BIOS release, Build #150 production
– Moved Smart Battery Setup nodes to new Setup Screen “Smart Battery Configuration”
– Added distinct Setup Nodes for all four supported Smart Batteries
Setup [F2]: Advanced -> SMART Battery Configuration -> ACPI Smart Battery 1-4
Available options: Auto (Default), Disabled, Forced– Modified handling of SMBus modes (enable/disable) for CompactPCI
– Added an ACPI AC Device to show OS that the system is on AC or system is on battery
===================================================================================================================
2015-02-06: BIOS release, Build #148 production
– Extended ACPI support for Smart Batteries connected to SMBus switch of EKF SBX-DUB
– Disabled xHCI boot support to avoid hangs during POST when a non-Intel xHCI (USB 3.0) controller is detected
===================================================================================================================
2015-01-21: BIOS release, Build #146 production
– Updated DOS utility progspi.exe to V3.9
– Added Setup node to control ACPI Smart Battery
Setup [F2]: Advanced -> ACPI Configuration -> ACPI Smart Battery
Available options: Disabled, Auto (Default), Support one|two|three|four Bats– Added Setup node to control EKF SBX-DUB
Setup [F2]: Advanced -> ACPI Configuration -> CPCI-S Slot of SBX-DUB
Available options: Auto (Default), Slot GA [0-7]
An error message is shown if EKF SBX-DUB is expected but not found.– An error message is shown if EEPROM of EKF SBX-DUB is not correctly programmed
– Added ACPI support for Smart Batteries connected to SMBus switch of EKF SBX-DUB
If no SBX-DUB is detected, Smart Battery devices are not available in OS.– Added EKF Shell command ’ema’ (EKF Memory Access)
Allows to measure memory access speed.– Added Setup node to control SMBus routing to CompactPCI
Setup [F2]: Advanced -> Board Configuration -> SMBus to CompactPCI Serial
Available options: Disabled, Auto (Default), Enabled– Added Setup node to control SMBus routing to an EKF Sideboard
Setup [F2]: Advanced -> Board Configuration -> SMBus to EKF Sideboard
Available options: Disabled, Auto (Default), Enabled===================================================================================================================
2014-10-24: BIOS release, Build #144 production
– Fixed an USB memory allocation failure
– Reset all entries in Setup menu “Boot” to factory defaults, if jumper “GP” is set during POST
– Extended hotkey string at bottom of POST screen for UEFI Shell (F5)
– Prohibit any try of an OS to initiate a SPI Flash Update via UEFI services
– If QuickBoot is enabled in BIOS Setup, Setup node “Load OPROM” is now suppressed
– Bits 7-0 of POST Codes now written to Port 80 AND to Port 84
Bits 15-8 of POST Codes written to Port 85 only– Extended Setup node which selects timeout for a SATA device attached to Intel SATA Controller
Setup [F2]: Advanced -> SATA Configuration -> Timeout for Device Ready
Available options: 500ms, 3s, 6s, 9s, 12s (Default), 15s, 20s, 30s, 45s, 60s
The selected timeout is the maximum time waiting for a SATA device to become ready.
This option is only valid if Intel SATA controller interface mode is “AHCI” or “RAID”.– Extended Setup node which selects timeout after the UEFI Boot Manager invokes a Boot Option
Setup [F2]: Main -> Boot Features -> Select Timeout for Boot Option
Available options: Disabled (Default), 5s, 10s, 20s, 30s, 45s, 1 min, 2 min, 5 min, 10 min, 30 min===================================================================================================================
2014-09-04: BIOS release, Build #142 production
– Fixed: All ME Setup nodes are now read-only if BIOS Setup is entered in User mode
Setup [F2]: Security -> Set User Password– Updated DOS utility progspi.exe to V3.8
Refused programming and verifying of Atmel SPIs.===================================================================================================================
2014-08-14: BIOS release, Build #140 production
– If a RTC Reset is detected, the initialization of RTC date and time registers to default values is now skipped
– Added Setup node to select timeout for a SATA device attached to Intel SATA Controller.
Setup [F2]: Advanced -> SATA Configuration -> Timeout for Device Ready
Available options: 500ms, 3s, 6s, 9s, 12s (Default), 15s, 20s, 30s
The selected timeout is the maximum time waiting for a SATA device to become ready.
This option is only valid if Intel SATA controller interface mode is “AHCI” or “RAID”.– Added Setup node to select timeout for an IDE device attached to Intel SATA Controller.
Setup [F2]: Advanced -> SATA Configuration -> Timeout for Dev Not Busy
Available options: 500ms, 2s, 5s, 10s (Default), 20s, 31s
The selected timeout is the maximum time waiting for an IDE device to be not busy.
This option is only valid if Intel SATA controller interface mode is “IDE”.– Added full RAID support for Intel SATA Controller
Setup [F2]: Advanced -> SATA Configuration -> Interface Mode
Available options: IDE, AHCI (Default), RAID
For RAID support select “RAID” and press CTRL-I during POST to configure an Intel RAID system– Extended AHCI and RAID Software Features
Setup [F2]: Advanced -> SATA Configuration -> AHCI/RAID Software Config
Not all Setup items in this menu can be selected if Intel SATA controller mode is set to AHCI.– Disabled feature “Locate SATA Device” per LED
– Restructured “Summary Screen”. “Summary Screen” is shown at end of POST if Setup node
Setup [F2]: Main -> Diagnostic Summary Screen
is set to “Enabled”.– Additionally show Help Screen of a Setup item as a Pop-Up Window (F1 key)
This allows to show much more information for a specific Setup item– Updated DOS utility progspi.exe to V3.6
===================================================================================================================
2014-06-05: BIOS release, Build #138 production
– Added support for PS/2 Keyboard and Mouse
PS/2 is automatically enabled if a Super-IO (SIO) of type SMSC SCH3114 is detected on an EKF Expansion board.– Stretching on Sleep signals after SUS well power failure is now enabled per default
Setup [F2]: Advanced -> Board Configuration -> SLP Stretching after SUS Power Up
If this option is disabled, the detection of certain peripheral boards failed sometimes.
Enabling this option has the disadvantage that boot time after power-up increases slightly.– Reset system if the reset is initiated by a command to the possibly non-existing keyboard controller. This
solves the Windows XP restart problem, which occurs if no SIO (Super-IO) is installed in the system.– Added support to control serial ports A-D on an EKF Expansion board via BIOS Setup
Setup [F2]: Advanced -> Super-IO Configuration -> Serial Port [A-D]
Available options: Disabled, Enabled (Default)
Every physical serial port can be mapped to one of four IO base addresses
Setup [F2]: Advanced -> Super-IO Configuration -> IO Base
Available options: 3F8 (COM1), 2F8 (COM2), 3E8 (COM3), 2E8 (COM4)
Setup [F2]: Advanced -> Super-IO Configuration -> IRQ
Available options: 3, 4, 7, 11 and 15– Fixed an issue with serial port detection on an EKF Expansion board, i.e. selecting BIOS defaults
during BIOS setup (F9 key) is not necessary to reenable SIO devices after a temporary SIO removal.– Added support for BIOS Write Protection
Setup [F2]: Advanced -> Board Configuration -> BIOS Write Lock
Available options: Disabled (Default), Enabled
If this item is set to Enabled, the whole BIOS region (part of the on-board SPI Flash) is write protected
for every software which tries to write to the BIOS. The write protection can only be removed by setting
a jumper on the board.– Improved description and modified structure of Setup nodes in Security menu
Setup [F2]: Security– Now all Setup nodes are read-only if BIOS setup is entered in User mode
Setup [F2]: Security -> Set User Password===================================================================================================================
2014-05-19: BIOS release, Build #136 production
– Added support for serial ports COM3 and COM4 of Super-IO SMSC SCH3114 on EKF Expansion boards
– Added Setup node to select top of memory below 4G
Setup [F2]: Advanced -> Memory Configuration -> Select maximum TOLUD
Decrease value if a peripheral board needs more MMIO space.– Disabled support for MMIO above 4G
– Added Setup node to allow a delay before SA PCI Express initialization starts
Setup [F2]: Advanced -> PCI Express Configuration -> SA PCI Express Miscellaneous Configuration -> Delay before PCIe initialization
Available options: Disabled, 10 ms (Default), 100 ms, 500 ms
Note: Don’t confuse this delay with the general and always executed 100 ms delay from end of reset to
first PCI Express configuration cycle. The delay selected by this Setup item is an additional delay.– Added initialization of MaxPayload and CommonClock setting for SA PCI Express ports
– Changed default PCI Express speed for both CompactPCI Serial Fat Pipe slots to GEN2 (5MB/s)
– Added Setup node to skip loading of options ROMs of AMD graphics controller
Setup [F2]: Advanced -> Graphics Configuration -> Load AMD Option ROMs
Available options: Disabled (Default), Enabled
AMD graphic options ROMs are installed on MXM modules used on EKF SV1-CLIP– Added Setup node to skip loading of options ROMs of Nvidia graphics controller
Setup [F2]: Advanced -> Graphics Configuration -> Load NVIDIA Option ROMs
Available options: Disabled (Default), Enabled
Nvidia graphic options ROMs are installed on MXM modules used on EKF SV1-CLIP– Added Setup node to skip loading of options ROMs of Silicon Motion graphics controller
Setup [F2]: Advanced -> Graphics Configuration -> Load NVIDIA Option ROMs
Available options: Disabled (Default), Enabled
Silicon Motion options ROMs are installed on e.g. XMC graphics module EKF DV1-DRAGON– Fixed an issue with writable PCI vendor IDs
===================================================================================================================
2014-03-31: BIOS release, Build #134 production
– Added Board configuration menu
Setup [F2]: Advanced -> Board Configuration -> SMBus Device
Setup [F2]: Advanced -> Board Configuration -> SB Configuration -> PCH Sleep S3 Min Assert
Setup [F2]: Advanced -> Board Configuration -> SB Configuration -> PCH Sleep S4 Min Assert
Setup [F2]: Advanced -> Board Configuration -> Processor Configuration -> Automatic Thermal Control– Added separate configuration menus for SA (System Agent) PCI Express Ports 1-2
Setup [F2]: Advanced -> PCI Express Configuration -> SA PCI Express Port Configuration– Added Setup node to enable or disable SA PCI Express Port 1
Setup [F2]: Advanced -> PCI Express Configuration -> SA PCI Express Port Configuration -> Control SA PCI Express Port 1
Available options: Disabled, Enabled (Default)
This port is routed to CompactPCI Serial Fat Pipe Slot 1.– Added Setup node to enable or disable SA PCI Express Port 2
Setup [F2]: Advanced -> PCI Express Configuration -> SA PCI Express Port Configuration -> Control SA PCI Express Port 2
Available options: Disabled, Enabled (Default)
This port is routed to CompactPCI Serial Fat Pipe Slot 2.– Removed Setup node “State After G3”, cause SC1-ALLEGRO always goes to state S0 after G3
– Added Setup node to select timeout after the UEFI Boot Manager invokes a Boot Option
Setup [F2]: Main -> Boot Features -> Select Timeout for Boot Option
Available options: Disabled (Default), 1 min, 5 minutes, 30 minutes
Previously timeout was fixed to 5 minutes, so board was rebooted after 5 minutes when e.g. in Setup– Fixed a bug which caused some CPU variables not saved during BIOS Setup
===================================================================================================================
2014-03-20: BIOS release, Build #132 production
– Fixed a bug in SIO detection, Serial COM ports sometimes not detected
===================================================================================================================
2014-03-07: BIOS release, Build #130 production
– Removed unfeasible Phoenix/Microsoft “feature” which disables USB support in the BIOS. This occurred after
a Windows Vista/7/8 installation in UEFI mode: Setup [F2]: Main -> Boot Features -> Boot Priority -> UEFI First
With Build #130 USB is always enabled, even if Microsofts Windows Boot Manager is installed.– If no EKF Expansion board is installed in the system, all SIO devices will now be disabled in ACPI table.
– Added support for ACPI thermal management. This is used for ACPI passive cooling and critical temperature
selection. Granularity and tolerance of ACPI temperature management is 4 degree Celsius.
Setup [F2]: Advanced -> ACPI Configuration -> ACPI management for TZ00
Available options are: Disabled, Enabled (Default)
Setting this item to Disabled, returns fixed temperature 30 deg C from ACPI thermal zone TZ00.– Added setup node to control ACPI Critical Trip Point
Setup [F2]: Advanced -> ACPI Configuration -> Critical Trip Point:
The trip point can be changed in one degree steps from 50-120 degree Celsius.
Default value is 108 degree Celsius.– ACPI passive cooling allows to limit the maximum value for the CPU internal temperature via BIOS Setup.
If the selected temperature is reached, CPU voltage and clock speed is reduced to cool down the processor.
This setup item allows to control ACPI Passive Cooling Trip Point:
Setup [F2]: Advanced -> ACPI Configuration -> Passive Cooling Trip Point
The trip point can be changed in one degree steps from 30-105 degree Celsius.
Default value is 100 degree Celsius.– Added setup nodes to control ACPI passive cooling constants
Setup [F2]: Advanced -> ACPI Configuration -> Passive TC1 value:
Setup [F2]: Advanced -> ACPI Configuration -> Passive TC2 value:
Setup [F2]: Advanced -> ACPI Configuration -> Passive TSP value:
For more information about these settings read http://www.acpi.info/spec.htm– Added setup node to control Sleep Stretching after SUS Well Power Up
Setup [F2]: Advanced -> SB Configuration -> SLP Stretching after SUS PowUp
Available options: Disabled (Phoenix Default), Enabled– Added setup node to control Sleep S3 Minimum Assertion Width
Setup [F2]: Advanced -> SB Configuration -> PCH Sleep S3 Min Assert
Available options: 60us, 2ms, 50ms (Default), 2s– Added setup node to control Sleep S4 Minimum Assertion Width
Setup [F2]: Advanced -> SB Configuration -> PCH Sleep S4 Min Assert
Available options: EDS, 1s (Default), 2s, 3s, 4s===================================================================================================================
2014-02-21: BIOS release, Build #128 production
– Added support for serial COM ports of Super-IO SMSC SCH3114 on EKF Expansion boards.
Supported are:
– COM port A (COM1) in front panel (bottom) of EKF CCI-RAP, CCO-CONCERT or PCS-BALLET
– COM port B (COM2) in front panel (top) of EKF CCI-RAP or CCO-CONCERT===================================================================================================================
2014-01-28: BIOS release, Build #126 production
– Enabled Intel Management Engine (ME) by default
Note: If EKF SC1-ALLEGRO is equipped with SPIs (Flash Memory) of type Atmel, enabling Intel ME firmware can
lead to problems under certain circumstances. The reason is that Intel ME firmware V8.x.xx.xx for Ivy Bridge
chipsets unfortunately does not correctly support SPIs from Atmel. Other types of SPIs (e.g. from Winbond, EON
or Macronix) are not affected. Contact EKF for further information.– Changed default mode for Setup option “Load OPROMs” to “All”
Setup [F2]: Main -> Boot Features -> Load ORPOM -> [All | On Demand]– More information about installed Memory in BIOS Setup
Setup [F2]: Main -> System Information– Several cosmetic modifications in BIOS Setup
– Modified Intel Video BIOS V2169 (now EKF Version 2) to support DisplayPort on EKF PCS-BALLET
– Removed support for SDVO (DVI) on EKF CCO-CONCERT
===================================================================================================================
2013-10-25: BIOS release, Build #124 production
– PCH internal Ethernet Controller (top RJ45) is now always existent, even after a Power Cycle
– Supported SC1-ALLEGRO special ICC profile (with Spread Spectrum Off), if ME File System is valid.
– PCH PCI Device 22 (ME #1) is always disabled, no yellow exclamation mark under Windows
– UEFI Shell: Added new option -n (show only variable names) for utility dmpstore
– Intel SATA Port 6 is now disabled by default to avoid long waiting time if no SATA device is attached
– Improved Restart capability when an USB Keyboard with an integrated Hub is installed
– Make call to Setup (F2 key during POST) an “bootable” entry in BIOS Setup menu “Boot”
– Make call to Boot Menu (F11 key during POST) an “bootable” entry in BIOS Setup menu “Boot”
– UEFI Shell can be called with key F5 during POST
– Diagnostic Splash screen can be called with key F4 during POST
===================================================================================================================
2013-08-23: BIOS release, Build #122 production
– Avoided the setting of the Run/Stop bit of all EHCI controllers of type Pericom PI7C9X442SL found in the system
===================================================================================================================
2013-08-09: BIOS release, Build #120 production
– Restructured BIOS Setup form “PCH PCI Express Root Port x Configuration”
Setup [F2]: Advanced -> PCH PCI Express Root Port [1, 3-5] Configuration”– Updated Intel Video BIOS to V2169, EKF Configuration Version 1
+ Added support for native DisplayPort at bottom mDP (mini DisplayPort) connector (previously only DVI-over-DP
was supported at bottom mDP in front panel of SC1-ALLEGRO).
+ Added full Hot Plug support under BIOS and DOS for both mDP interfaces in front panel of SC1-ALLEGRO.
+ In case of Hot Plug: Always the last attached monitor shows the screen (regardless whether top or bottom
mDP connector, DVI-over-DP or native DP).
+ If two monitors are attached during Video BIOS initialization, monitor attached to top mDP connector is used
to show the screen.
+ Intel tool “HD Graphics Control Panel” (Windows) shows the current Video BIOS version as “V2169.1”.===================================================================================================================
2013-07-16: BIOS release, Build #114 production
– Added initialization of LM87 hardware monitor. This supports monitoring tools which do not
initialize this controller (like SpeedFan for Windows)
Note: For EKF SC1-ALLEGRO use Speedfan >= V4.47– Added a workaround for USB EHCI and XHCI controller found on CompactPCI Serial
– Added Setup item to control CPU speed during and after POST
Setup [F2]: Advanced -> CPU Configuration -> Performance
Available options are: High Performance (Default), Low Performance– Cleaned up ACPI tables for devices unused on SC1
– Changed default value for System Agent (SA) Root Port Gen3 Equalization from P7 to P8.
Table offset changed to zero based.
Setup [F2]: Advanced -> SA PCI Express Port Configuration -> Gen3 Root Port Preset– Added support to enable or disable PCH internal LAN controller
Setup [F2]: Advanced -> Network Configuration -> Control PCH Internal LAN
Available options are: Disabled, Enabled (Default)– Added support for Network Boot for PCH internal LAN controller
Setup [F2]: Advanced -> Network Configuration -> Control PCH LAN Option ROM
Available options are: Disabled (Default), Enabled– Added support for Wake On LAN for PCH internal LAN controller
Setup [F2]: Advanced -> Network Configuration -> Control PCH LAN WOL
Available options are: Disabled (Default), Enabled
Note: WOL is only supported on SC1-ALLEGRO >= Rev.2– Suppressed HotPlug and eSATA Setup nodes of Intel SATA Port 6
– Increased BIOS AHCI timeout for Intel SATA Port 6 (JMB393) to 2s
===================================================================================================================
2013-05-24: BIOS release, Build #112 production
– Devices in CompactPCI Serial Fat Pipe Slots 1 and 2 were not always detected. This has been fixed.
– Show detailed interface description of Intel SATA ports in SMBIOS tables
– Changed default mode for JMB393 to Port Multiplier
– Added Setup option to allow to disable Intel SATA Port 6 attached to JMB393
Setup [F2]: Advanced -> ATA Configuration -> Serial ATA Port 6 -> Control Port
Available options are: Disabled, Enabled (Default)– Decreased BIOS timeout for Intel SATA Port 6 (JMB393) if no device is detected
– Added Setup option to select max SATA speed for devices attached to Intel SATA controller
Setup [F2]: Advanced -> ATA Configuration -> Select max. Speed
Available options are: 1.5 Gb/s, 3.0 Gb/s and 6.0 Gb/s (Default)– Allocated now only one PCI IRQ (11) to all PCI devices
– Intel SATA Ports are now numbered 1-6 instead of 0-5
– Supported now up to 256 buses on PCI
– Fixed a bug which prevents simultaneous use of all four Ethernet Controllers of SC1-ALLEGRO
– Ethernet Controller 4 is now additionally enabled by default
– Fixed a performance issue if more than 8GB of Memory is installed
– Show size of Memory correctly during POST even if more than 10GB of Memory is installed
– Added support for SPI flash EON EN25Q64 and Macronix MX25L6435E
===================================================================================================================
2013-03-07: BIOS release, Build #110 production
– Changed Default Boot Priority from “UEFI first” to “Legacy first”
– Enabled support for speaker on EKF Expansion boards
– Increased number of history screens for UEFI shell from 3 to 20
– Show board manufacturer in BIOS Setup
Setup [F2]: Main -> System Information – Board Manufacturer– Show board type and revision in BIOS Setup
Setup [F2]: Main -> System Information – Board Type– Added Setup item which controls the behaviour of POST if an error occured during POST
Setup [F2]: Advanced -> Boot Configuration -> Select Mode on POST Error:
Available options: Default, i.e. use error specific behaviour (Default),
Press Key to continue, 3s delay before continue, No Delay before continue===================================================================================================================
2012-11-29: BIOS release, Build #008 production
===================================================================================================================
2012-11-08: BIOS release, Build #004 production
===================================================================================================================
2012-10-25: First BIOS release compiled by EKF, Build #002
===================================================================================================================
< End of File >
Expansion Modules
Specifications
- CompactPCI® Serial (PICMG® CPCI-S.0) System Slot Controller
- Based on the Intel® Chief River Platform (Ivy Bridge + ECC CPU, Panther Point PCH)
- Intel® Core™ i7 Mobile + ECC Processor, 22nm Process Technology, Low Power, Quad-Core & Dual-Core
- i7-3612QE Processor 2.1GHz • 35W TDP Standard Voltage Quad-Core
- i7-3555LE Processor 2.5GHz • 25W TDP Low Voltage Dual-Core
- i7-3517UE Processor 1.7GHz • 17W TDP Ultra Low Voltage Dual-Core
- i5-3610ME Processor 2.7GHz • 35W TDP Standard Voltage Dual-Core
- i3-3120ME Processor 2.4GHz • 35W TDP Standard Voltage Dual-Core
- i3-3217UE Processor 1.6GHz • 17W TDP Ultra Low Voltage Dual-Core
- Celeron® 1047UE Processor 1.4GHz • 17W TDP Ultra Low Voltage Dual-Core
- Integrated HD Graphics Engine, 3 Independent Displays, Enhanced Media Processing
- Integrated Memory Controller up to 16GB DDR3 +ECC 1600
- DDR3 +ECC Soldered Memory up to 8GB
- DDR3 +ECC SO-DIMM Memory Module Socket up to 8GB
- Performance Rating Passmark 8.0 SC1-680D (i7-i7-3612QE): Passmark Rating 2241, CPU Rating 7243
- Intel® QM77 Panther Point Platform Controller Hub (PCH)
- Up to 3 Display Configuration (Front Panel: Dual mDP or Single VGA Connector Option)
- Max Resolution 2560 x 1600 (DisplayPort), 1920 x 1200 (VGA)
- 2 + 1 SATA Channels 6Gbps/3Gbps for Mezzanine Storage Modules (Connector HSE)
- CompactFlash® Card with C40-SCFA Mezzanine Module Option (4HP Maintained)
- CFast™ Card with C41-CFAST Mezzanine Module Option (4HP Profile Maintained)
- SATA 1.8-Inch Solid State Drive with C42-SATA Mezzanine Card Option (4HP Maintained)
- Dual mSATA Modules with C47-MSATA RAID Mezzanine Card Option (4HP Maintained)
- Dual M.2 SATA Modules with C48-M2 RAID Mezzanine Card Option (4HP Maintained)
- 7 x SATA Channels 3Gbps to Backplane Connectors, 5 Channels Available for Hardware RAID Configuration Level 0/1/10 + Hot Spare (Option RAID Level 3/5)
- 4 x USB 3.0 XHCI SuperSpeed Channels (2 x to F/P Connectors, 2 x Backplane)
- 10 x USB 2.0 EHCI (6 x to Mezzanine Connectors, 4 x Backplane)
- 4 x Gigabit Ethernet Controllers (2 x F/P RJ-45 Jacks and 2 x Backplane Connector)
- 8 + 8 x PCI Express® Gen3 Lanes to CPCI Serial Backplane (CPCI Serial Fat Pipe 1 + 2)
- 4 + 4 x PCI Express® Gen2 Lanes (4 x Mezzanine Connector, 4 x Backplane)
- Legacy I/O Mezzanine Expansion Connector EXP (USB, HD Audio, LPC)
- High Speed I/O Mezzanine Expansion Connector HSE (4 x SATA, 4 x USB)
- PCI Express® Mezzanine Expansion Connector PCIE (4 Lanes)
- Third Display Mezzanine Expansion Connector SDVO/DP
- Variety of Mezzanine Expansion Boards (Side Cards) Available with and w/o PCIe
- Most Mezzanines Optionally Equipped with 2.5-Inch Single- or Dual-Drive
- Phoenix® UEFI (Unified Extensible Firmware Interface) with CSM (Compatibility Support Module)
- Long Term Availability
- Coating, Sealing, Underfilling on Request
- RoHS compliant
- MTBF 104 x 103h (11.9 years) @ 40°C
- Designed & Manufactured in Germany
- ISO 9001 Certified Quality Management System
- RT OS BSP & Driver Support – VxWorks 7.0 Available, QNX and Others on Request
Simplified Block Diagram
